MIT and Lincoln Laboratory have access to the latest integrated circuit (IC) CAD tools for design and verification running on a grid computing system. While the majority of IC fabrication takes place in external foundries, Lincoln Laboratory has a unique fabrication capability for 90 nm, fully depleted silicon-on-insolator (FDSOI) CMOS and 3D integration in the Microelectronics Laboratory. Additionally, for non-silicon compatible processing (gold, etc.), additional facilities are available for use in device development and advanced packaging.
MIT and Lincoln Laboratory have access to the latest integrated circuit (IC) CAD tools for design and verification running on a grid computing system. While the majority of IC fabrication takes place in external foundries, Lincoln Laboratory has a unique fabrication capability for 90 nm, fully depleted silicon-on-insolator (FDSOI) CMOS and 3D integration in the Microelectronics Laboratory. Additionally, for non-silicon compatible processing (gold, etc.), additional facilities are available for use in device development and advanced packaging.
